This invention relates to a method and apparatus for electro-optically measuring a voltage signal, and more particularly to a method and apparatus for electro-optically measuring a voltage signal to dc accuracy by performing a runtime fine offset calibration in which the measured signal is referenced to an electrical average of the voltage signal. The voltage signal then is measured with the calibrated system.
The increase in integrated circuit speeds enabled by advances in ECL and GaAs technologies has created a need for faster test systems which can test devices based upon such technologies by providing test data signals at speeds up to the gigahertz range with excellent timing accuracy. Obtaining dc accurate measurements of response patterns to such test data signals has proven difficult.
Electro-optic test systems typically use synchronous detection techniques such as AC coupling to measure the response signals for high speed test data signals. Such techniques have not been able to provide dc accurate measurements of instantaneous voltage levels due to drifting offsets in the electro-optic system.
In an electro-optic system including an array of light refracting crystals and electro-optic sensors, calibration of the system is achieved using look-up tables to store compensating offsets for the various crystals. Thermal and mechanical effects on a crystal, however, cause stressinduced birefringence causing the needed offsets to drift. As a result, the offsets in the look-up table may become inaccurate or skewed over time. When trying to measure instantaneous dc response levels, or signals levels to extremely accurate timing constraints, the changing offset becomes significant. As a result, the measurement of electro-optic signal levels to dc accuracy at extreme timing accuracies has been a difficult long standing problem. Typical AC coupling techniques do not achieve such accuracy.
Accordingly, there is a need for an electro-optic system which can accurately measure a voltage signal at dc accuracy. Such ability is desireable for applications including, but not limited to, multi-channel oscilloscopes, voltage imaging systems and testing of high speed integrated circuit devices.
An electro-optic voltage imaging system created in part by the inventor has been described at: (1) "Electro-Optic Technology Supports Gigahertz Speeds" by Francois J. Henley, Electronics Test, September 1988; (2) "System Tests Devices at GHz Rates" by Lyle H. McCarty, Design News, Apr. 10, 1989(3) "Electro-Optic Device Tester Tops 1 GHz" by John Novellino, Electronic Design, Sep. 8, 1988; and (4) "An Ultra High Speed Test System" by Francois J. Henley, IEEE Design & Test of Computers, February 1989.
An electro-optic test system block diagram is discussed at "Using Electro-Optic Sampling Technology For Accurate Gigahertz ATE: Overview of the Art" by Francois J. Henley, published 1990 IEEE VLSI Test Symposium. A high speed pattern generator for the test system is described at "High Speed Pattern Generator and GaAs Pin Electronics for a Gigahertz Production test System" by Dean J. Kratzer, Steve Barton, Francois J. Henley and David A. Plomgrem, Proceedings of IEEE 1988 International Test Conference, September 1988. A test head design for an electro-optic test system is described at "Test Head Using Electro-optic Receivers and GaAs Pin Electronics for a Gigahertz Production test System" by Francois J. Henley and Hee-June Choi, Proceedings of IEEE 1988 International Test Conference, September 1988.
Other related publications include (1) "Achieving ATE Accuracy at Gigahertz Test Rates: Comparison of Electronic and Electro-Optic Sampling Technologies" by Francois J. Henley and Hee-June Choi, presented at the International Test Conference, August 1989; (2) "Systems Solutions Based on Electro-optic Sampling to High Speed IC Test Problems" by Francois J. Henley and Douglas B. MacDonald, published SPIE Vol. 795 Characterization of Very High Speed Semiconductor Devices & Integrated Circuits (1987). pp. 345-351; and (3) "Characterization of High Speed (Above 500 MHz) Devices Using Advanced ATE--Techniques, Results and Device Problems" by Steve Barton, Proceedings of the IEEE 1989, International Test Conference, August 1989.